Sel<Cc>; Table 6.17. Condition Code Mask Descriptions - Intel i960 Jx Developer's Manual

6.2.58 SEL<cc>
Mnemonic: selno
selg
sele
selge
sell
selne
selle
selo
Format: sel*
Description: Selects either src1 or src2 to be stored in dst based on the condition code bits
in the arithmetic controls. When for Unordered the condition code is 0, or
when for the other cases the logical AND of the condition code and the mask
part of the opcode is not zero, then the value of src2 is stored in the desti-
nation. Else, the value of src1 is stored in the destination.
if ((mask & AC.cc) || (mask == AC.cc))
Action:
dst
else
dst
STANDARD
Faults:
Select Based on Unordered
Select Based on Greater
Select Based on Equal
Select Based on Greater or Equal
Select Based on Less
Select Based on Not Equal
Select Based on Less or Equal
Select Based on Ordered
src1, src2,
reg/lit reg/lit
Table 6.17.
Condition Code Mask Descriptions
Instruction Mask
selno 000
2
selg 001
2
sele 010
2
selge 011
2
sell 100
2
selne 101
2
selle 110
2
selo 111
2
src2;
src1;
Refer to
INSTRUCTION SET REFERENCE
dst
reg
Condition
Unordered
Greater
Equal
Greater or equal
Less
Not equal
Less or equal
Ordered
section 6.1.6, "Faults" (pg.
6
6-5).
6-97