Boundary Conditions For Physical Memory Regions; Internal Memory Locations; Bus Transactions Across Region Boundaries; Modifying The Pmcon Registers - Intel i960 Jx Developer's Manual

13.5

Boundary Conditions for Physical Memory Regions

The following sections describe the operation of the PMCON registers during conditions other
than "normal" accesses.
13.5.1

Internal Memory Locations

The PMCON registers are ignored during accesses to internal memory or memory-mapped
registers. The processor performs those accesses over 32-bit buses, except for local register cache
accesses. The register bus is 128 bits wide.
13.5.2

Bus Transactions Across Region Boundaries

An unaligned bus request that spans region boundaries uses the PMCON settings of both regions.
Accesses that lie in the first region use that region's PMCON parameters, and the remaining
accesses use the second region's PMCON parameters.
For example, an unaligned quad word load/store beginning at address 1FFF FFFEH would cross
boundaries from region 0_1 to 2_3. The physical parameters for region 0_1 would be used for the first
2-byte access and the physical parameters for region 2_3 would be used for the remaining access.
13.5.3

Modifying the PMCON Registers

An application can modify the value of a PMCON register by using the
a or instruction is issued when an access is in progress, the current access is completed
st sysctl
before the modification takes effect.
MEMORY CONFIGURATION
st or sysctl instruction. If
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