Move - Intel i960 Jx Developer's Manual

Microprocessor
Table of Contents

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6.2.45

MOVE

Mnemonic:
mov
movl
movt
movq
Format:
mov*
Copies the contents of one or more source registers (specified with src) to one
Description:
or more destination registers (specified with dst).
For
movl
register of several successive registers. src1 and dst registers must be even
numbered (e.g., g0, g2, ... or r4, r6, ...) for
four (e.g., g0, g4, ... or r4, r8, ...) for
The moved register values are unpredictable when: 1) the src and dst
operands overlap; 2) registers are not properly aligned.
Action:
mov:
if(is_reg(src1))
dst = src1;
else
{
dst[4:0] = src1;
dst[31:5] = 0;
}
movl:
if((reg_num(src1)%2 != 0) || (reg_num(dst)%2 != 0))
{
dst = undefined_value;
dst_+_1 = undefined_value;
generate_fault(OPERATION.INVALID_OPERAND);
}
else if(is_reg(src1))
{
dst = src1;
dst_+_1 = src1_+_1;
}
else
{
dst[4:0] = src1;
dst[31:5] = 0;
dst_+_1[31:0] = 0;
}
Move
Move Long
Move Triple
Move Quad
src1,
dst
reg/lit
reg
,
and
, src1 and dst specify the first (lowest numbered)
movt
movq
#src1 is a 5-bit literal.
#src1 is a 5-bit literal.
INSTRUCTION SET REFERENCE
movl
and an integral multiple of
and
.
movt
movq
6
6-81

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