Intel i960 Jx Developer's Manual page 5

Microprocessor
Table of Contents

Advertisement

4.4.4
Instruction Cache Visibility ...................................................................................... 4-5
4.4.5
Instruction Cache Coherency .................................................................................. 4-5
4.5
DATA CACHE ............................................................................................................... 4-6
4.5.1
Enabling and Disabling the Data Cache .................................................................. 4-6
4.5.2
Multi-Word Data Accesses that Partially Hit the Data Cache .................................. 4-7
4.5.3
Data Cache Fill Policy ............................................................................................. 4-8
4.5.4
Data Cache Write Policy ......................................................................................... 4-8
4.5.5
Data Cache Coherency and Non-Cacheable Accesses .......................................... 4-9
4.5.6
External I/O and Bus Masters and Cache Coherency ........................................... 4-10
4.5.7
Data Cache Visibility ............................................................................................. 4-10
CHAPTER 5
INSTRUCTION SET OVERVIEW
5.1
INSTRUCTION FORMATS ........................................................................................... 5-1
5.1.1
Assembly Language Format ................................................................................... 5-1
5.1.2
Instruction Encoding Formats .................................................................................. 5-2
5.1.3
Instruction Operands ............................................................................................... 5-3
5.2
INSTRUCTION GROUPS ............................................................................................. 5-4
5.2.1
Data Movement ....................................................................................................... 5-5
5.2.1.1
Load and Store Instructions ............................................................................. 5-5
5.2.1.2
Move ................................................................................................................ 5-6
5.2.1.3
Load Address ................................................................................................... 5-6
5.2.2
Select Conditional ................................................................................................... 5-6
5.2.3
Arithmetic ................................................................................................................ 5-7
5.2.3.1
5.2.3.2
Remainder and Modulo .................................................................................... 5-8
5.2.3.3
Shift, Rotate and Extended Shift ...................................................................... 5-9
5.2.3.4
Extended Arithmetic ....................................................................................... 5-10
5.2.4
Logical ................................................................................................................... 5-10
5.2.5
Bit, Bit Field and Byte Operations ......................................................................... 5-11
5.2.5.1
Bit Operations ................................................................................................ 5-11
5.2.5.2
Bit Field Operations ........................................................................................ 5-11
5.2.5.3
Byte Operations ............................................................................................. 5-11
5.2.6
Comparison ........................................................................................................... 5-12
5.2.6.1
Compare and Conditional Compare ............................................................... 5-12
5.2.6.2
Compare and Increment or Decrement .......................................................... 5-13
5.2.6.3
Test Condition Codes ..................................................................................... 5-13
5.2.7
Branch ................................................................................................................... 5-14
5.2.7.1
Unconditional Branch ..................................................................................... 5-14
5.2.7.2
Conditional Branch ......................................................................................... 5-15
5.2.7.3
Compare and Branch ..................................................................................... 5-15
5.2.8
Call/Return ............................................................................................................ 5-16
5.2.9
Faults ..................................................................................................................... 5-17
5.2.10
Debug .................................................................................................................... 5-18
5.2.11
Atomic Instructions ................................................................................................ 5-18
v

Advertisement

Table of Contents
loading

Table of Contents