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MACHINE-LEVEL INSTRUCTION FORMATS
For the register-indirect-with-offset addressing mode (MODE = 10), offset field value is added to
the address in the abase register. Clearing the offset value creates a register indirect addressing
mode; however, this operation can generally be carried out faster by using the MEMB version of
this addressing mode.
C.5.2
MEMB Format Addressing
The MEMB format provides the following seven addressing modes:
•
absolute displacement
•
register indirect with displacement
•
register indirect with index and displacement
•
IP with displacement
The abase and index fields specify local or global registers, the contents of which are used in
address computation. When the index field is used in an addressing mode, the processor automati-
cally scales the index register value by the amount specified in the SCALE field.
the encoding of the scale field. The optional displacement field is contained in the word following
the instruction word. The displacement is a 32-bit signed two's complement value.
Scale
000
001
010
011
100
101 to 111
NOTE:
Usage of a reserved encoding causes an unpredictable result.
For the IP with displacement mode, the value of the displacement field plus eight is added to the
address of the current instruction.
C-6
•
•
•
Table C-7. Encoding of Scale Field
register indirect
register indirect with displacement
index with displacement
Table C-7
Scale Factor (Multiplier)
1
2
4
8
16
Reserved
gives
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