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PRCB
See Process Control Block.
Precise Faults
Faults generated in the order in which they occur in the instruction stream
and with sufficient fault information to allow software to recover from the
faults without altering program's control flow. The AC register NIF bit
and the
Previous Frame
The address of the previous stack frame's first byte. It is contained in bits
Pointer (PFP)
4 through 31 of local register r0.
Priority Field
PC register bits 16 through 20. This field determines processor priority
(from 0 to 31). When the processor is in the executing state, it sets its
priority according to this value. It also uses this field to determine
whether to service an interrupt immediately or to save the interrupt for
later service.
Priority
A value from 0 to 31 that indicates the priority of a program or interrupt;
highest priority is 31. The processor stores the priority of the task
(program or interrupt) that it is currently working on in the priority field
of the PC register. See also NMI.
Process Control
One of three (IMI) components, PRCB contains base addresses for
Block (PRCB)
system data structures and initial configuration information for the core
and integrated peripherals.
Process Controls
A 32-bit register that contains miscellaneous pieces of information used
(PC) Register
to control processor activity and show current processor state. Flags and
fields in this register include the trace enable bit, execution mode flag,
trace fault pending flag, state flag, priority field and internal state field.
All unused bits in this register are reserved and must be set to 0.
Register Score-
Internal flags that indicate a particular register or group of registers is
boarding
being used in an operation. This feature enables the processor to execute
some instructions in parallel and out-of-order. When the processor begins
executing an instruction, it sets the scoreboard flag for the destination
register in use by that instruction. If the instructions that follow do not use
scoreboarded registers, the processor can execute one or more of those
instructions concurrently with the first instruction.
Return Instruction
The address of the instruction following a call or branch-and-link
Pointer (RIP)
instruction that the processor is to execute after returning from the called
procedure. The RIP is contained in local register r2. When the processor
executes a procedure call, it sets the RIP to the address of the instruction
immediately following the procedure call instruction.
Return Type Field
Bits 0, 1 and 2 of local register r0. When a procedure call is made using the
integrated call and return mechanism, this field indicates the call type: local,
supervisor, interrupt or fault. The processor uses this information to select
the proper return mechanism when returning from the called procedure.
instruction allow software to force all faults to be precise.
syncf
GLOSSARY
Glossary-5
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