Bit Field Manipulation; Optimizing The Use Of Immediate Values - Intel PXA270 Optimization Manual

Intel XScale® Microarchitecture & Intel® Wireless MMX™ Technology Optimization
4.2.3.1

Bit Field Manipulation

The Intel XScale® Microarchitecture shift and logical operations provide a useful way of
manipulating bit fields. Bit field operations can be optimized as:
;Set the bit number specified by r1 in register r0
mov
orr
;Clear the bit number specified by r1 in register r0
mov
bic
;Extract the bit-value of the bit number specified by r1 of the
;value in r0 storing the value in r0
mov
and
;Extract the higher order 8 bits of the value in r0 storing
;the result in r1
mov
The method outlined here can greatly accelerate encryption algorithms such as Data Encryption
Standard (DES), Triple DES (T-DES), Hashing functions (SHA). This approach helps other
application such as network packet parsing, and voice stream parsing.
4.2.4

Optimizing the Use of Immediate Values

Use the Intel XScale® Microarchitecture MOV or MVN instruction when loading an immediate
(constant) value into a register. Refer to the ARM* Architecture Reference Manual for the set of
immediate values that can be used in a MOV or MVN instruction. It is also possible to generate a
whole set of constant values using a combination of MOV, MVN, ORR, BIC, and ADD
instructions. The LDR instruction has the potential of incurring a cache miss in addition to
polluting the data and instruction caches. Use a combination of the above instructions to set a
register to a constant value. An example of this is shown in these code samples.
;Set the value of r0 to 127
mov
;Set the value of r0 to 0xfffffefb.
mvn
;Set the value of r0 to 257
mov
orr
;Set the value of r0 to 0x51f
mov
orr
4-6
r2, #1
r0, r0, r2, asl r1
r2, #1
r0, r0, r2, asl r1
r1, r0, asr r1
r0, r1, #1
r1, r0, lsr #24
r0, #127
r0, #260
r0, #1
r0, r0, #256
r0, #0x1f
r0, r0, #0x500
Intel® PXA27x Processor Family Optimization Guide