Active Color 12-Bit Per Pixel Mode; Signals; Passive Color Dual-Scan Display Typical Connection - Intel PXA27 Series Design Manual

LCD Interface
7.5.5.2 Schematics / Block Diagram
See Figure 7-5
Figure 7-5. Passive Color Dual-Scan Display Typical Connection
7.5.5.3 Layout Notes
Refer to Section 7.4, "Layout Notes,"
7.5.6

Active Color 12-bit per pixel Mode

An active color display does not send dithered data to the panel. The lines driven represent the
digital value of the pixel being transmitted. A single pixel is transmitted per clock cycle. The bits of
data describe the intensity level of the red, green and blue for each pixel. 12 bpp mode is a mode
that is not directly supported by the PXA27x processor. However, 12 bpp panels are supported by
programming and operating the PXA27x processor in 16 bpp, but only connecting a subset of the
data lines.
7.5.6.1

Signals

The signals described in
PXA27x processor.
II:7-14
for illustration of typical connections for a dual-scan color passive display.
LDD<0>
LDD<1>
LDD<2>
LDD<3>
LDD<4>
LDD<5>
Top left Blue "Upper Panel"
LDD<6>
Top left Green "Upper Panel"
LDD<7>
Top left Red "Upper Panel"
LDD<8>
LDD<9>
LDD<10>
LDD<11>
LDD<12>
LDD<13>
Top left Blue "Lower Panel"
LDD<14>
Top left Green "Lower Panel"
LDD<15>
Top left Red "Lower Panel"
L_PCLK_WR
L_LCLK_A0
L_FCLK_RD
L_BIAS
for layout notes and considerations.
Table 7-8 implement an active color 12-bit per pixel display with the
DU_0
DU_1
DU_2
DU_3
DU_4
DU_5
DU_6
DU_7
DL_0
DL_1
DL_2
DL_3
DL_4
DL_5
DL_6
DL_7
CLOCK
HORIZ. SYNC
VERT. SYNC
DATA ENABLE
®
Intel PXA27x Processor Family Design Guide