Parallel Port; Parallel Port Bit Assignments; Table 3-11 Parallel Port Addresses; Table 3-12 Parallel Port Status Register Bit Assignments - Intel i960 Series User Manual

HARDWARE REFERENCE
3.8

PARALLEL PORT

A Centronics PC-compatible receive-only parallel port is implemented on the Cyclone EP. You access
and control the parallel port by using three memory-mapped registers (see Table 3-11):
• Parallel port data register
• Parallel port status register
• Parallel port control register
The port uses a DB25 connector with PC-compatible pin assignments. A cable is included with the
Cyclone EP to facilitate downloading of code from a host development workstation or PC.
Address
B008 0000H
B008 0004H
3.8.1

Parallel Port Bit Assignments

Table 3-12 shows the read-only parallel port status register bit assignments.
Table 3-12. Parallel Port Status Register Bit Assignments
The parallel port control register is a write-only 8-bit register that controls parallel port operation. This
register also contains an interrupt enable bit (PINTEN) that enables the parallel port interrupt. When the
interrupt is enabled, an interrupt is signaled when either PSTROBE or PPINIT is asserted. The interrupt
is cleared when the parallel port data register is read. Table 3-12 shows the parallel port control register.
3-10
Table 3-11. Parallel Port Addresses
Read Register
Status Register
Data Register
Bit Signal Mnemonic
7 not used
6 not used
5 BUSY
4 ACK
3 PPSLCTIN
2 PPFEED
1 PSTROBE
0 PPINIT
Write Register
Control Register
Unused
Signal Name
—
—
Bus Busy
Acknowledge
Select In
Paper Feed
Data Strobe
Port Initialize