Floating-Point Register To Memory Data Translation - Double Extended, Integer, Parallel Fp And - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

Figure 5-9. Floating-point Register to Memory Data Translation – Double Extended,
Integer, Parallel FP and Spill
sign exponent
FR:
Memory/GR:
Integer/Parallel FP Store/getf.sig
sign exponent
FR:
Memory:
Double Extended-precision Store
sign exponent
FR:
0 0 0
Memory:
Register Spill
Both little-endian and big-endian byte ordering is supported on floating-point loads and
stores. For both single and double memory formats, the byte ordering is identical to the
32-bit and 64-bit integer data types (see Section 3.2.3, "Byte Ordering"). The
byte-ordering for the spill/fill memory and double-extended formats is shown in
Figure 5-10.
1:96
integer
bit
integer
bit
integer
bit
0 0 0
significand
significand
significand
Volume 1, Part 1: Floating-point Programming Model