Overview Of The Optimization Guide - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

About the Optimization Guide
The second portion of this document explains in detail optimization techniques
associated with the Itanium instruction set. It is intended for those interested in
furthering their understanding of application architecture features and optimization
techniques that benefit application performance. Intel and the industry are developing
compilers to take advantage of these techniques. Application developers are not
advised to use this as a guide to assembly language programming for the Itanium
architecture.
Note: To demonstrate techniques, this guide contains code examples that are not tar-
geted towards a specific processor based on the Itanium architecture, but
rather a hypothetical implementation. For these code examples, ALU operations
are assumed to take one cycle and loads take two cycles to return from first
level cache and that there are two load/store execution units and four ALUs.
Other latencies and execution unit details are described as needed
1.1

Overview of the Optimization Guide

Chapter 2, "Introduction to Programming for the Intel
provides an overview of the application programming environment.
Chapter 3, "Memory Reference"
and data speculation.
Chapter 4, "Predication, Control Flow, and Instruction Stream"
features related to predication, control flow, and branch hints.
Chapter 5, "Software Pipelining and Loop Support"
optimizing loops through use of software pipelining.
Chapter 6, "Floating-point Applications"
floating- point applications and features that address these limitations.
Volume 1, Part 2: About the Optimization Guide
®
discusses features and optimizations related to control
provides a detailed discussion on
discusses current performance limitations in
§
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Itanium Architecture"
describes optimization
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