Eflag Register (Ar24) - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

Table 6-4. IA-32 Environment Runtime Integrity Checks (Continued)
Reference Resource
d-bit
data memory
type
references to
DS, ES, FS and GS
s, p, a-bits
g-bit/limit
d-bit
type
data memory
references to
CS
s, p, a-bits
g-bit/limit
type
memory
s-bit
references to
LDT,GDT,
a, d-bits
TSS
p-bit
g-bit/limit
a. Code Fetch Faults are delivered as higher priority GPFault(0).
b. The GP Fault error code is the selector value if the reference is to GDT or LDT. Otherwise the error code is zero.
6.2.2.4 IA-32 Application EFLAG Register
The EFLAG (AR24) register is made up of two major components, user arithmetic flags
(CF, PF, AF, ZF, SF, OF, and ID) and system control flags (TF, IF, IOPL, NT, RF, VM, AC,
VIF, VIP). None of the arithmetic or system flags affect Itanium instruction execution.
See Table 6-5, "IA-32 EFLAGS Register Fields" on page 1:124
and Itanium instruction reads/writes to this application register. For details on system
flags in the IA-32 EFLAGS register, see
on page
Figure 6-1.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
reserved (set to 0)
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
The arithmetic flags are used by the IA-32 instruction set to reflect the status of IA-32
operations, control IA-32 string operations, and control branch conditions for IA-32
instructions. These flags are ignored by Itanium instructions. Flags ID, OF, DF, SF, ZF,
AF, PF and CF are defined in the Intel
Developer's Manual.
Volume 1, Part 1: IA-32 Application Execution Model in an Intel
Real Mode
dpl
read and not readable, write and not writeable
dpl
rd/wr checks are
ignored
dpl
2:243.
IA-32 EFLAG Register (AR24)
id vip vif ac vm rf 0 nt
Protected Mode
ignored
ignored
ignored
are not 1
segment limit violation
ignored
ignored
ignored
rd and not readable,
wr and not writeable
are not 1
segment limit violation
ignored
ignored
is not 0
ignored
is not 1
segment limit violation
Section 10.3.2, "IA-32 System EFLAG Register"
iopl
reserved (set to 0)
®
64 and IA-32 Architectures Software
® ®
Itanium System Environment
VM86Mode Fault
is not 16-bit
data expand down
GPFault(0)
is not 16-bit
data expand down
GPFault(0)
rd/wr checks are
ignored
GPFault
(Selector/0)
for the behavior on IA-32
8 7 6 5 4 3
of df if tf sf zf 0 af 0 pf 1 cf
b
2 1 0
1:123