Ia-32 Eflags Register Fields - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

Table 6-5.
.
a
EFLAG
cf
pf
af
zf
sf
tf
if
df
of
iopl
nt
rf
vm
ac
vif
vip
id
a. On entry into the IA-32 instruction set all bits may be read by subsequent IA-32 instructions, after exit from the
IA-32 instruction set these bits represent the results of all prior IA-32 instructions. None of the EFLAG bits alter
the behavior of Itanium instruction set execution.
6.2.2.5 IA-32 Floating-point Registers
IA-32 floating-point register stack, numeric controls and environment are mapped into
the Itanium floating-point registers FR8 - FR15 and the application register name space
as shown in
1:124

IA-32 EFLAGS Register Fields

Bits
0 IA-32 Carry Flag. See the Intel
Manual for details.
1 Ignored – For IA-32 instructions, writes are ignored, reads return one. For Itanium
instructions, the implementation can either ignore writes and return one on reads; or
write the value, and return the last value written on reads.
3,5, Ignored – For IA-32 instructions, writes are ignored, reads return zero. For Itanium
instructions, the implementation can either ignore writes and return zero on reads, or
15
write the value and return the last value written on reads.
2 IA-32 Parity Flag. See the Intel
Manual for details.
4 IA-32 Aux Flag. See the Intel
Manual for details.
6 IA-32 Zero Flag. See the Intel
Manual for details.
7 IA-32 Sign Flag. See the Intel
Manual for details.
8
See Section 10.3.2, "IA-32 System EFLAG Register" on page
9
10 IA-32 Direction Flag. See the Intel
Manual for details.
11 IA-32 Overflow Flag. See the Intel
Manual for details.
13:12
14
16
17
See Section 10.3.2, "IA-32 System EFLAG Register" on page
18
19
20
21
63:22 This field is reserved for IA-32 instructions – reads return zeros and non-zero writes
causes IA_32_Exception (General Protection) faults. For Itanium instructions, the
implementation can either raise Reserved Register/Field fault on non-zero writes and
return zero on reads, or write the value (no Reserved Register/Field fault), and return the
last value written on reads.
Table 6-6.
Volume 1, Part 1: IA-32 Application Execution Model in an Intel
Description
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
64 and IA-32 Architectures Software Developer's
®
Itanium
2:243.
2:243.
®
System Environment