Minimizing Code Size During Speculation - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

memory conflicts, or aliasing in the ALAT, the decision as to where to place recovery
code for advanced loads is more difficult than for control speculation and should be
based on the expected conflict rate for each load.
As a general rule, efficient compilers will attempt to minimize code growth related to
speculation. As an example, moving a load above the join of two paths may require
duplication of speculative code on every path. The flow graph depicted in
and the explanation shows how this could arise.
Figure 3-3.
If the compiler or programmer advanced the load up to block B from its original
non-speculative position, all speculative code would need to be duplicated in both
blocks B and C. This duplicated code might be able to occupy NOP slots that already
exist. But if space for the code is not already available, it might be preferable to
advance the load to block A since only one copy would be required in this case.
3.5.4 Using Post-increment Loads and Stores
Post-increment loads and stores can improve performance by combining two operations
in a single instruction. Although the text in this section mentions only post-increment
loads, most of the information applies to stores as well.
Post-increment loads are issued on M-units and can increment their address register by
either an immediate value or by the contents of a general register. The following
pseudo-code that performs two loads:
can be rewritten using a post-increment load:
Post-increment loads may not offer direct savings in dependency path height, but they
are important when calculating addresses that feed subsequent loads:
• A post-increment load avoids code size expansion by combining two instructions
into one.
• Adds can be issued on either I-units or M-units. When a program combines an add
with a load, an I-unit or M-unit resource remains available that otherwise would
have been consumed. Thus, throughput of dependent adds and loads can be
doubled by using post-increment loads.
Volume 1, Part 2: Memory Reference

Minimizing Code Size During Speculation

Block B
ld8 r2=[r1]
add r1=1,r1 ;;
ld8 r3=[r1]
ld8 r2=[r1],1 ;;
ld8 r3=[r1]
Block A
Block C
st
ld
Figure 3-3
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