Combining Data And Control Speculation - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

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Although every speculative computation needs to be checked, this does not mean that
every speculative load requires its own chk.s. Speculative checks can be optimized by
taking advantage of the propagation of NaT bits through registers as described in
Section
3.5.6.
3.4.3.3
Spills, Fills and the UNAT Register
Saving and restoring of registers that may have set NaT bits is enabled by st8.spill
and ld8.fill instructions and the User NaT Collection application register (UNAT).
The "spill general register and NaT" instruction, st8.spill, saves eight bytes of a
general register to memory and writes its NaT bit into the UNAT. Bits 8:3 of the memory
address of the store determine which UNAT bit is written with the register NaT value.
The "fill general register" instruction, ld8.fill, reads eight bytes from memory into a
general register and sets the register NaT bit according to the value in the UNAT.
Software is responsible for saving and restoring the UNAT contents to ensure correct
spilling and filling of NaT bits.
The corresponding floating-point instructions, stf.spill and ldf.fill, save and
restore floating-point registers in floating-point register format without surfacing
exceptions due to NaTVals.
3.4.3.4
Terminology Review
The terms below are related to control speculation:
• Control speculative load
A speculative load that is scheduled prior to an earlier controlling branch.
References to "speculative loads" without qualifiers generally refer to control
speculative loads and not data speculative loads. Loads using the ld.s instruction
are control speculative loads.
• Speculation check
An instruction that checks whether a speculative instruction has deferred an
exception. Speculation check instructions include labels that point to
compiler-generated recovery code. The speculation check instruction is chk.s.
• Recovery code
Code executed to recover from a speculation failure. Control speculative recovery
code is analogous to data speculative recovery code.
3.4.4

Combining Data and Control Speculation

A load that is both data and control speculative is called a speculative advanced load.
The ld.sa instruction performs all the operations of both a speculative load and an
advanced load. An ALAT entry will not be allocated if this type of load generates a
deferred exception token, so an advanced load check instruction (chk.a) is sufficient to
check for both interference from subsequent stores and for deferred exceptions.
1:156
Volume 1, Part 2: Memory Reference

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