Definition Of Overflow; Floating-Point Exception Trap Prioritization - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

Figure 5-12. Floating-point Exception Trap Prioritization
FP TRAP
FLAGS.o=1
FLAGS.i|=tmp_i
17
Exp=tmp_exp%2
Sig=tmp_sig
ISR.o=1 Y
ISR.i=tmp_i
ISR.fpa=tmp_fpa
FP TRAP
Y
ISR.i=1
ISR.fpa=tmp_fpa
5.4.2

Definition of Overflow

The overflow exception can occur whenever the rounded true result would exceed, in
magnitude, the largest finite number in the destination format.
The IEEE Overflow Floating-Point Exception trap disabled response for all normal and
Parallel-FP arithmetic instructions is to either return an infinity or the correctly signed
maximum finite value for the destination precision. This depends on the rounding
mode, the sign of the result, and the operation. An inexact result exception is signaled.
The IEEE Overflow Floating-Point Exception trap enabled response for all normal
arithmetic instructions is to return the true biased exponent value MOD 2
Parallel-FP arithmetic instructions is to return the true biased exponent value MOD 2
The value's significand is rounded to the specified precision and written to the
destination register. If the rounded value is different from the infinitely-precise value,
Volume 1, Part 1: Floating-point Programming Model
Infinity
Inf
Result
Inf.Precision Operation
Unbounded Range Rounding
tmp_exp, tmp_sig
tmp_i, tmp_fpa
>Emax
Overflow
Enabled?
>=Emin
N
<=Emax
MaxReal/
Inf. Res
tmp_fpa
FLAGS.o=1
Y
FLAGS.i=1
N
Inexact
Enabled?
START
Pre-
Zero
Computed
Res?
<Emin
Underflow
tmp_exp?
Enabled?
Y
Zero Res.
tmp_i=1
tmp_fpa=0
Y
FLAGS.u=1
tmp_i?
N
DONE
Decision
Terminal
State
tmp_exp=result exponent
tmp_sig=result significand
tmp_i=inexactness indicator
Zero tmp_fpa=significand roundup
Result
FP TRAP
FLAGS.u=1
FLAGS.i|=tmp_i
Exp=tmp_exp%2
Sig=tmp_sig
ISR.u=1
Y
ISR.i=tmp_i
ISR.fpa=tmp_fpa
N
N
FTZ?
Inf.Precision Operation
Bound Range Rounding
tmp_i
tmp_i, tmp_fpa
?
Zero/Den/MinReal Res
N
17
and for all
Point
17
8
.
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