Ctop And Cexit Execution Flow - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

and a decision is made to exit the loop. The special case in which a software-pipelined
loop branch is executed with EC equal to 0 can occur in unrolled software-pipelined
loops if the target of the cexit branch is set to the next sequential bundle.
Figure 5-1.
There are two types of software-pipelined loop branches for counted loops. br.ctop is
taken when a decision to continue kernel loop execution is made, and is not taken
otherwise. It is used when the loop execution decision is located at the bottom of the
loop. br.cexit is not taken when a decision to continue kernel loop execution is made,
and is taken otherwise. It is used when the loop execution decision is located
somewhere other than the bottom of the loop.
5.4.3.2 Counted Loop Example
A conceptual view of a pipelined iteration of the example counted loop on
with II equal to one is shown below:
stage 1:(p16)
stage 2:(p17)
stage 3:(p18)
stage 4:(p19)
To generate an efficient pipeline, the compiler must take into account the latencies of
instructions and the available functional units. For this example, the load latency is two
and the load and add are scheduled two cycles apart. The pipeline below is coded
assuming there are two memory ports and the loop count is 200.
Volume 1, Part 2: Software Pipelining and Loop Support

ctop and cexit Execution Flow

ctop, cexit
LC?
(prolog / kernel) ! = 0
LC - -
EC = EC
PR[63] = 1
RRB - -
ctop: branch
cexit: fall-thru
ld4 r4 = [r5],4
---
add r7 = r4,r9
st4 [r6] = r7,4
== 0 (epilog)
> 1
EC?
==1
LC = LC LC = LC
EC - - EC - -
PR[63] = 0 PR[63] = 0
RRB - - RRB - -
// empty stage
(special unrolled loops)
== 0
LC = LC
EC = EC
PR[63] = 0
RRB = RRB
ctop: fall-thru
cexit: branch
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