Allocation Paths Supported In The Memory Hierarchy - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

Each locality hint implies a particular allocation path in the memory hierarchy. The
allocation paths corresponding to the locality hints are depicted in
allocation path specifies the structures in which the line containing the data being
referenced would best be allocated. If the line is already at the same or higher level in
the hierarchy no movement occurs. Hinting that a datum should be cached in a
temporal structure indicates that it is likely to be read in the near future. Hinting that a
datum should not be cached in a temporal structure indicates that it is not likely to be
read in the near future. For stores, the .nta completer also hints that the store may be
part of a set of streaming stores that would likely overwrite the entire cache line
without any data in that line first being read, enabling the processor to avoid fetching
the data.
Figure 4-2. Allocation Paths Supported in the Memory Hierarchy
Level 1
Temporal
Structure
Non-temporal
Structure
Explicit prefetch is defined in the form of the line prefetch instruction (lfetch,
lfetch.fault). The lfetch instructions moves the line containing the addressed byte to
a location in the memory hierarchy specified by the locality hint. If the line is already at
the same or higher level in the hierarchy, no movement occurs. Both immediate and
register post-increment are defined for lfetch and lfetch.fault. The lfetch
instruction does not cause any exceptions, does not affect program behavior, and may
be ignored by the implementation. The lfetch.fault instruction affects the memory
hierarchy in exactly the same way as lfetch but takes exceptions as if it were a 1-byte
load instruction.
Implicit prefetch is based on the address post-increment of loads, stores, lfetch and
lfetch.fault. The line containing the post-incremented address is moved in the
memory hierarchy based on the locality hint of the originating load, store, lfetch or
lfetch.fault. If the line is already at the same or higher level in the hierarchy then no
movement occurs. Implicit prefetch does not cause any exceptions, does not affect
program behavior, and may be ignored by the implementation.
Another form of hint that can be provided on loads is the ld.bias load type. This is a
hint to the implementation to acquire exclusive ownership of the line containing the
addressed data. The bias hint does not affect program functionality and may be ignored
by the implementation.
Volume 1, Part 1: Application Programming Model
Level 2
Temporal Temporal
Structure Structure
Non-temporal
Non-temporal
Structure
Structure
Cache
Level 3
Temporal, level 1
Non-temporal, level 1
Non-temporal, level 2
Non-temporal, all levels
Figure 4-2. The
Memory
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