Sleep Mode; Table 48. Cpu Wake-Up Versus System Operating Mode - STMicroelectronics STM32WL5 Series Reference Manual

Power control (PWR)
CPU1 CPU2
System
mode
0 0 0
0 1 0
0 0 0
1 0 0
Run
0 0 1
1 1 0
0 0 1
0 1 0
1 1 0
(1)
Stop
0 1 1
Standby 1 0 1
N/A Others
1. Wake-up from Stop 0 and 1 or Stop 2 mode can be detected by the corresponding CnSTOPF and
CnSTOP2F.
6.5.5

Sleep mode

I/O states in Sleep mode
In Sleep mode, all I/O pins keep the same state as in Run mode.
Enter Sleep mode
The Sleep mode is entered from Run mode according to
SLEEPDEEP bit in the CPU system control register is cleared (see
Exit Sleep mode
The MCU exits the Sleep mode (see
252/1450

Table 48. CPU wake-up versus system operating mode

CPU1 wake-up
0 Wake-up from Run
Wake-up from Stop, but system is
0
already in Run due to CPU2
1 Wake-up from Run
Wake-up from Standby, but system is
0
already in Run due to CPU2
0 Wake-up from Run
Wake-up from Standby followed by Stop,
0 but system is already in Run due to
CPU2
1 Wake-up from Run
1 Wake-up from Stop (CPU2 still in CStop) Wake-up from Stop (CPU1 still in CStop)
Wake-up from Stop after the system has
1
been in Standby (CPU2 still in CStop)
1 Wake-up from Stop (CPU2 still in CStop)
Wake-up from Standby (CPU2 still in
0
CStop)
Not valid, does not occur
Table 49) as indicated in
RM0453 Rev 5
CPU2 wake-up
Wake-up from Run
Wake-up from Run
Wake-up from Stop, but system is
already in Run due to CPU1
Wake-up from Run
Wake-up from Standby, but system is
already in Run due to CPU1.
Wake-up from Run
Wake-up from Standby followed by Stop,
but system is already in Run due to
CPU1
Wake-up from Stop (CPU1 still in CStop)
Wake-up from Stop after the system
having been in Standby (CPU1 still in
CStop).
Wake-up from Standby (CPU1 still in
CStop)
Enter low-power mode, when the
Table 49).
Exit low-power
RM0453
mode.