STMicroelectronics STM32WL5 Series Reference Manual page 949

RM0453
28.4.4 LPTIM reset and clocks
The LPTIM can be clocked using several clock sources. It can be clocked using an internal
clock signal which can be any configurable internal clock source selectable through the
RCC (see RCC section for more details). Also, the LPTIM can be clocked using an external
clock signal injected on its external Input1. When clocked with an external clock source, the
LPTIM may run in one of these two possible configurations:
• The first configuration is when the LPTIM is clocked by an external signal but in the
same time an internal clock signal is provided to the LPTIM from configurable internal
clock source (see RCC section).
•
The second configuration is when the LPTIM is solely clocked by an external clock
source through its external Input1. This configuration is the one used to realize Timeout
function or Pulse counter function when all the embedded oscillators are turned off
after entering a low-power mode.
Programming the CKSEL and COUNTMODE bits allows controlling whether the LPTIM
uses an external clock source or an internal one.
When configured to use an external clock source, the CKPOL bits are used to select the
external clock signal active edge. If both edges are configured to be active ones, an internal
clock signal must also be provided (first configuration). In this case, the internal clock signal
frequency must be at least four times higher than the external clock signal frequency.
28.4.5 Glitch filter
The LPTIM inputs, either external (mapped to GPIOs) or internal (mapped on the chip-level
to other embedded peripherals), are protected with digital filters that prevent any glitches
and noise perturbations to propagate inside the LPTIM. This is in order to prevent spurious
counts or triggers.
Before activating the digital filters, an internal clock source must first be provided to the
LPTIM. This is necessary to guarantee the proper operation of the filters.
The digital filters are divided into two groups:
•
The first group of digital filters protects the LPTIM internal or external inputs. The digital
filters sensitivity is controlled by the CKFLT bits
• The second group of digital filters protects the LPTIM internal or external trigger inputs.
The digital filters sensitivity is controlled by the TRGFLT bits.
Note: The digital filters sensitivity is controlled by groups. It is not possible to configure each digital
filter sensitivity separately inside the same group.
The filter sensitivity acts on the number of consecutive equal samples that is detected on
one of the LPTIM inputs to consider a signal level change as a valid transition.
shows an example of glitch filter behavior in case of a 2 consecutive samples programmed.
RM0453 Rev 5
Low-power timer (LPTIM)
Figure 263
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