STMicroelectronics STM32WL5 Series Reference Manual page 30

Contents
27.3.11 Using the break function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 912
27.3.12 Bidirectional break inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 915
27.3.13 6-step PWM generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 916
27.3.14 One-pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 918
27.3.15 UIF bit remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 919
27.3.16 Slave mode – combined reset + trigger mode . . . . . . . . . . . . . . . . . . . 919
27.3.17 DMA burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 919
27.3.18 Using timer output as trigger for other timers (TIM16/TIM17) . . . . . . . 920
27.3.19 Debug mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 921
27.4 TIM16/TIM17 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 922
27.4.1
27.4.2
27.4.3
27.4.4
27.4.5
27.4.6
27.4.7
27.4.8
27.4.9
27.4.10 TIMx prescaler (TIMx_PSC)(x = 16 to 17) . . . . . . . . . . . . . . . . . . . . . . 933
27.4.11 TIMx auto-reload register (TIMx_ARR)(x = 16 to 17) . . . . . . . . . . . . . 933
27.4.12 TIMx repetition counter register (TIMx_RCR)(x = 16 to 17) . . . . . . . . . 934
27.4.13 TIMx capture/compare register 1 (TIMx_CCR1)(x = 16 to 17) . . . . . . 934
27.4.14 TIMx break and dead-time register (TIMx_BDTR)(x = 16 to 17) . . . . . 935
27.4.15 TIMx DMA control register (TIMx_DCR)(x = 16 to 17) . . . . . . . . . . . . . 937
27.4.16 TIMx DMA address for full transfer (TIMx_DMAR)(x = 16 to 17) . . . . . 938
27.4.17 TIM16 option register 1 (TIM16_OR1) . . . . . . . . . . . . . . . . . . . . . . . . . 939
27.4.18 TIM16 alternate function register 1 (TIM16_AF1) . . . . . . . . . . . . . . . . 939
27.4.19 TIM16 input selection register (TIM16_TISEL) . . . . . . . . . . . . . . . . . . 940
27.4.20 TIM17 option register 1 (TIM17_OR1) . . . . . . . . . . . . . . . . . . . . . . . . . 940
27.4.21 TIM17 alternate function register 1 (TIM17_AF1) . . . . . . . . . . . . . . . . 941
27.4.22 TIM17 input selection register (TIM17_TISEL) . . . . . . . . . . . . . . . . . . 942
27.4.23 TIM16/TIM17 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 943
28 Low-power timer (LPTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 945
30/1450
TIMx control register 1 (TIMx_CR1)(x = 16 to 17) . . . . . . . . . . . . . . . . 922
TIMx control register 2 (TIMx_CR2)(x = 16 to 17) . . . . . . . . . . . . . . . . 923
TIMx DMA/interrupt enable register (TIMx_DIER)(x = 16 to 17) . . . . . 924
TIMx status register (TIMx_SR)(x = 16 to 17) . . . . . . . . . . . . . . . . . . . 925
TIMx event generation register (TIMx_EGR)(x = 16 to 17) . . . . . . . . . 926
TIMx capture/compare mode register 1
(TIMx_CCMR1)(x = 16 to 17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 927
TIMx capture/compare mode register 1 [alternate]
(TIMx_CCMR1)(x = 16 to 17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 928
TIMx capture/compare enable register (TIMx_CCER)(x = 16 to 17) . . 930
TIMx counter (TIMx_CNT)(x = 16 to 17) . . . . . . . . . . . . . . . . . . . . . . . 932
RM0453 Rev 5
RM0453