Pwr Port C Pull-Up Control Register (Pwr_Pucrc); Pwr Port C Pull-Down Control Register (Pwr_Pdcrc) - STMicroelectronics STM32WL5 Series Reference Manual

Power control (PWR)
6.6.13

PWR port C pull-up control register (PWR_PUCRC)

This register is not reset when exiting Standby modes.
Access: additional APB cycles are needed to access this register versus those needed for a
standard APB access (three for a write and two for a read).
Address offset: 0x030
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
PU15 PU14 PU13 Res.
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:13 PU[15:13]: Port PC[y] pull-up (y = 13 to 15)
When set, each bit activates the pull-up on PC[y] when both APC bits are set in
register 3 (PWR_CR3)
not activated if the corresponding PC[y] bit is also set.
Bits 12:7 Reserved, must be kept at reset value.
Bits 6:0 PU[6:0]: Port PC[y] pull-up (y = 0 to 6)
When set, each bit activates the pull-up on PC[y] when both APC bits are set in
register 3 (PWR_CR3)
not activated if the corresponding PC[y] bit is also set.
6.6.14

PWR port C pull-down control register (PWR_PDCRC)

This register is not reset when exiting Standby modes.
Access: additional APB cycles are needed to access this register versus those needed for a
standard APB access (three for a write and two for a read).
Address offset: 0x034
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
PD15 PD14 PD13 Res.
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
276/1450
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
and in
and in
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
24 23 22
Res. Res. Res.
8 7 6
Res. Res. PU6
rw
PWR CPU2 control register 3
PWR CPU2 control register 3
24 23 22
Res. Res. Res.
8 7 6
Res. Res. PD6
rw
RM0453 Rev 5
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
PU5 PU4 PU3 PU2
rw rw rw rw
(PWR_C2CR3). The pull-up is
(PWR_C2CR3). The pull-up is
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
PD5 PD4 PD3 PD2
rw rw rw rw
RM0453
17 16
Res. Res.
1 0
PU1 PU0
rw rw
PWR control
PWR control
17 16
Res. Res.
1 0
PD1 PD0
rw rw