And Set-Once Mode Activated (Wave Bit Is Set); Figure 266. Lptim Output Waveform, Continuous Counting Mode Configuration - STMicroelectronics STM32WL5 Series Reference Manual

Low-power timer (LPTIM)
- Set-once mode activated:
Note that when the WAVE bitfield in the LPTIM_CFGR register is set, the Set-once mode is
activated. In this case, the counter is only started once following the first trigger, and any
subsequent trigger event is discarded as shown in
Figure 265. LPTIM output waveform, Single counting mode configuration
In case of software start (TRIGEN[1:0] = '00'), the SNGSTRT setting starts the counter for
one-shot counting.
Continuous mode
To enable the continuous counting, the CNTSTRT bit must be set.
In case an external trigger is selected, an external trigger event arriving after CNTSTRT is
set, starts the counter for continuous counting. Any subsequent external trigger event is
discarded as shown in
In case of software start (TRIGEN[1:0] = '00'), setting CNTSTRT starts the counter for
continuous counting.

Figure 266. LPTIM output waveform, Continuous counting mode configuration

LPTIM_ARR
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PWM
SNGSTRT and CNTSTRT bits can only be set when the timer is enabled (The ENABLE bit
is set to '1'). It is possible to change "on the fly" from One-shot mode to Continuous mode.
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and Set-once mode activated (WAVE bit is set)

LPTIM_ARR
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0
PWM
External trigger event
Figure 266.
0
External trigger event
Figure
Discarded triggers
RM0453 Rev 5
265.
Discarded trigger
RM0453
MSv39231V2
MSv39229V2