STMicroelectronics STM32WL5 Series Reference Manual page 138

Embedded flash memory (FLASH)
Bit 31 C2BOOT_LOCK: CPU2 boot lock enable option bit
Bit 30 BOOT_LOCK: CPU1 boot lock enable option bit
Bits 29:28 Reserved, must be kept at reset value.
Bit 27 nBOOT0: nBOOT0 option bit
Bit 26 nSWBOOT0: software BOOT0 selection
Bit 25 SRAM_RST: SRAM1 and SRAM2 erase when system reset
Note: PKA SRAM is always erased on any system.
Bit 24 SRAM2_PE: SRAM2 parity check enable
Bit 23 nBOOT1: boot configuration
Bits 22:20 Reserved, must be kept at reset value.
Bit 19 WWDG_SW: window watchdog selection
Bit 18 IWDG_STDBY: independent watchdog counter freeze in Standby mode
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This bit may be set by software at any time but a write to clear is only taken into account in
one of the following conditions:
- when ESE = 0 and staying in RDP level 0
- when ESE = 1 and staying in RDP level 0 by regressing FSD
- when ESE = 0 and regressing RDP level from 1 to 0
- when ESE = 1 and regressing RDP level from 1 to 0 and regressing ESE and or FSD.
0: CPU2 boot lock disabled
1: CPU2 boot lock enabled
This bit may be set by software at any time, but a write to clear is only taken into account in
one of the following conditions:
- when staying in RDP level 0
- when regressing RDP level from 1 to 0
0: CPU1 boot lock disabled
1: CPU1 boot lock enabled
If nSWBOOT0 bit selects BOOT0 to be taken from option bit nBOOT0, then this bit,
together with option nBOOT1, selects the boot modes (from the user flash memory, SRAM1
or system flash memory). Refer to
0: nBOOT0=0
1: nBOOT0=1
0: BOOT0 taken from the option bit nBOOT0
1: BOOT0 taken from PH3/BOOT0 pin
0: SRAM1 and SRAM2 erased when a system reset occurs
1: SRAM1 and SRAM2 not erased when a system reset occurs
0: SRAM2 parity check enabled
1: SRAM2 parity check disable
Together with the BOOT0 pin or option bit nBOOT0 (depending on nSWBOOT0 option bit
configuration), this bit selects boot mode from the user flash memory, SRAM1 or system
flash memory. Refer to Section 2.2: Boot
0: Hardware window watchdog
1: Software window watchdog
0: Independent watchdog counter frozen in Standby mode
1: Independent watchdog counter running in Standby mode
Section 2.2: Boot
configuration.
RM0453 Rev 5
configuration.
RM0453