Pwr Rss Command Register (Pwr_Rsscmdr); Pwr Register Map; Table 56. Pwr Register Map And Reset Values - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
Bits 14:0 Reserved, must be kept at reset value.
6.6.22

PWR RSS command register (PWR_RSSCMDR)

This register is only reset by a power-on reset (not reset on NRST and exit from Standby).
Address offset: 0x098
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 RSSCMD[7:0]: RSS command
Define a command to be executed by the RSS.
6.6.23

PWR register map

Offset Register name
PWR_CR1
0x000
Reset value
PWR_CR2
0x004
Reset value
PWR_CR3
0x008
Reset value
PWR_CR4
0x00C
Reset value
PWR_SR1
0x010
Reset value
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.

Table 56. PWR register map and reset values

24 23 22
Res. Res. Res.
8 7 6
Res.
rw rw
0
1 0
0
0 0
RM0453 Rev 5
Power control (PWR)
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
RSSCMD[7:0]
rw rw rw rw
0 1 0
0
0 0 0 0 0 0
0 0 0
0 0
17 16
Res. Res.
1 0
rw rw
LPMS
[2:0]
0 0 0 0 0 0
PLS [2:0]
0 0 0 0
0 0 0
0 0 0
0 0 0
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