Figure 260. 6-Step Generation, Com Example (Ossr=1) - STMicroelectronics STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Counter (CNT)
tim_ocxref
COM event
tim_ocx
Example 1
tim_ocxn
tim_ocx
Example 2
tim_ocxn
tim_ocx
Example 3
tim_ocxn

Figure 260. 6-step generation, COM example (OSSR=1)

CCxE = 1
CCxNE = 0
OCxM = 0010 (forced inactive)
CCxE = 1
CCxNE = 0
OCxM = 0100 (forced inactive)
CCxE = 1
CCxNE = 0
OCxM = 0010 (forced inactive)
General-purpose timers (TIM16/TIM17)
Write COM to 1
Write OCxM to 0100
Write CCxNE to 1
and OCxM to 0101
Write CCxNE to 0
and OCxM to 0100
RM0453 Rev 5
CCxE = 1
CCxNE = 0
OCxM = 0100
CCxE = 0
CCxNE = 1
OCxM = 0101
CCxE = 1
CCxNE = 1
OCxM = 0100
MSv62343V1
917/1450
944

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