Figure 24. Cpu2 Boot Options - STMicroelectronics STM32WL5 Series Reference Manual

Power control (PWR)
When CPU1 is used to initialize the system before CPU2 is booted, the procedure is the
following:
•
Before CPU1 enters CStop mode, it clears the C2BOOT bit.
•
When CPU1 exits CStop:
–
–
–
240/1450

Figure 24. CPU2 boot options

Reset
1
CPU1 CRUN, CSLEEP,
CPU2 CSTOP (BOOT HOLD)
5
CPU1 CRUN or CSLEEP
CPU2 CSTOP (BOOT HOLD)
7
CPU1 CSTOP
CPU2 CSTOP (BOOT HOLD)
9
STANDBY
CPU2 CSTOP (BOOT HOLD)
The system remains in Run mode and sets the C2BOOT bit, subsequently
processing the wake-up event.
The system exits a low-power mode from a CPU1 wake-up source. This initializes
the system and sets the C2BOOT bit, subsequently processing the wake-up
event.
The system exits a low-power mode from a CPU2 wake-up source. The C2HF
wake-up source wakes up CPU1, that initializes the system and sets the C2BOOT
bit.CPU1 subsequently goes back to CStop. After C2BOOT is set, CPU2 is woken
up by its wake-up source.
ILAC handling
CPU2 CSTOP
6
CPU1 CRUN, CSLEEP,
CPU2 CRUN, CSLEEP
C2BOOTS = 0
(ILAC)
2
C2BOOT = 1
and
(C2BOOTS = 1)
3
CPU1 CRUN or CSLEEP
CPU2 CSTOP
CPU1 CSTOP
Wake up CPU1
and
C2BOOT = 0
8
10
STANDBY
RM0453 Rev 5
CPU1 CRUN or CSLEEP
CPU2 CRUN or CSLEEP
4
CPU1 CSTOP
CPU2 CRUN or CSLEEP
CPU1 CSTOP
CPU2 CSTOP
Enter STANDBY
STANDBY
Wake up CPU2 and C2BOOT = 1
RM0453
RUN
LP-RUN
STOP0
STOP1
STOP2
LP_STOP
MSv50976V1