STMicroelectronics STM32WL5 Series Reference Manual page 411

RM0453
10.4.4 GPIOx pull-up/pull-down register (GPIOx_PUPDR) (x = A to B)
Address offset: Block A: 0x000C
Address offset: Block B: 0x040C
Reset value: Block A: 0x6400 0000
Reset value: Block B: 0x0000 0100
31 30 29 28
PUPD15[1:0] PUPD14[1:0]
rw rw rw rw
15 14 13 12
PUPD7[1:0] PUPD6[1:0]
rw rw rw rw
Bits 31:0 PUPDy[1:0]: Port Pxy pull configuration (y = 15 to 0)
10.4.5 GPIOx input data register (GPIOx_IDR) (x = A to B)
Address offset: Block A: 0x0010
Address offset: Block B: 0x0410
Reset value: 0x0000 XXXX
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
ID15 ID14 ID13 ID12
r r r
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 IDy: Port Pxy input data bit (y = 15 to 0)
27 26 25
PUPD13[1:0] PUPD12[1:0]
rw rw rw
11 10 9
PUPD5[1:0] PUPD4[1:0]
rw rw rw
These bits are written by software to configure the I/O pull-up or pull-down
00: No pull-up, pull-down
01: Pull-up
10: Pull-down
11: Reserved
27 26 25
Res. Res. Res.
11 10 9
ID11 ID10 ID9
r r r r
These bits are read-only. They contain the input value of the corresponding I/O port.
24 23 22
PUPD11[1:0] PUPD10[1:0]
rw rw rw
8 7 6
PUPD3[1:0]
rw rw rw
24 23 22
Res. Res. Res. Res.
8 7 6
ID8 ID7 ID6 ID5
r r r
RM0453 Rev 5
General-purpose I/Os (GPIO)
21 20 19 18
PUPD9[1:0]
rw rw rw rw
5 4 3 2
PUPD2[1:0] PUPD1[1:0]
rw rw rw rw
21 20 19 18
Res. Res. Res.
5 4 3 2
ID4 ID3 ID2
r r r r
17 16
PUPD8[1:0]
rw rw
1 0
PUPD0[1:0]
rw rw
17 16
Res. Res.
1 0
ID1 ID0
r r
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