Sub-Ghz Radio Random Number Register 0 (Subghz_Rngr0); Sub-Ghz Radio Sd Resolution Register (Subghz_Sdcfg0R); Sub-Ghz Radio Agc Rssi Control Register; (Subghz_Agcrssictl0R) - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
5.10.41

Sub-GHz radio random number register 0 (SUBGHZ_RNGR0)

Address offset: 0x81C
Reset value: 0x00
7 6
r r
Bits 7:0 RNDATA[7:0]: Random number data bits [7:0]
5.10.42

Sub-GHz radio SD resolution register (SUBGHZ_SDCFG0R)

Address offset: 0x889
Reset value: 0x00
7 6
rw rw
Bits 7:0 SD[7:0]: Radio SD resolution
5.10.43

Sub-GHz radio AGC RSSI control register

(SUBGHZ_AGCRSSICTL0R)

Address offset: 0x89B
Reset value: 0x00
7 6
rw rw
Bits 7:0 CALDATA[7:0]: AGC RSSI control
5.10.44

Sub-GHz radio receiver gain control register (SUBGHZ_RXGAINCR)

Address offset: 0x8AC
Reset value: 0x94
7 6
rw rw
Bits 7:2 SENSI_ADJUST[5:0]: Sensitivity Floor of AGC
5
r
5
rw
5
rw
5
SENSI_ADJUST[5:0]
rw
This bitfield must be kept at 0x25.
4 3
RNDATA[7:0]
r r
4 3
SD[7:0]
rw rw
4 3
CALDATA[7:0]
rw rw
4 3
rw rw
RM0453 Rev 5
Sub-GHz radio (SUBGHZ)
2 1
r r
2 1
rw rw
2 1
rw rw
2 1
PMODE[1:0]
rw rw
0
r
0
rw
0
rw
0
rw
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