STMicroelectronics STM32WL5 Series Reference Manual page 212

Sub-GHz radio (SUBGHZ)
5.10.15 Sub-GHz radio generic CRC initial LSB register
(SUBGHZ_GCRCINIRL)
Address offset: 0x6BD
Reset value: 0x0F
7 6
rw rw
Bits 7:0 CRCINI[7:0]: Generic packet CRC initial polynomial LSB bits [7:0]
5.10.16 Sub-GHz radio generic CRC polynomial MSB register
(SUBGHZ_GCRCPOLRH)
Address offset: 0x6BE
Reset value: 0x10
7 6
rw rw
Bits 7:0 CRCPOL[15:8]: Generic packet CRC polynomial MSB bits [15:8]
5.10.17 Sub-GHz radio generic CRC polynomial LSB register
(SUBGHZ_GCRCPOLRL)
Address offset: 0x6BF
Reset value: 0x21
7 6
rw rw
Bits 7:0 CRCPOLI[7:0]: Generic packet CRC initial polynomial LSB bits [7:0]
212/1450
5
rw
These bits are used for CRC initialization.
5
rw
These bits are used for CRC initialization.
5
rw
These bits are used for CRC initialization.
4 3
CRCINI[7:0]
rw rw
4 3
CRCPOL[15:8]
rw rw
4 3
CRCPOLI[7:0]
rw rw
RM0453 Rev 5
2 1
rw rw
2 1
rw rw
2 1
rw rw
RM0453
0
rw
0
rw
0
rw