Irq Interrupt Commands; Table 37. Irq Bit Mapping And Definition - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
bytes 7:6
Reset_Stats() command
Reset_Stats(0x00,0x00,0x00,0x00,0x00,0x00) resets the received packet
statistics as reported in Get_Stats() (NbPktReceived, NbPktCrcError, NbPktlengthError
and NbPktHeaderError).
0
Opcode
w
byte 0
byte 1
byte 2
byte 3
byte 4
byte 5
byte 6
5.8.6

IRQ interrupt commands

There are three IRQ interrupts that can be mapped to several sub-GHz radio interrupt
sources. The source of an interrupt is determined by reading the device status. Interrupts
are cleared using Clr_IrqStatus().
There are 10 possible interrupt sources used depending on the packet type and operating
mode. Each of these interrupt sources can be enabled or masked and mapped on any of the
IRQ interrupts.
A set of commands is used to configure and control the IRQ sources and interrupt
generation
Bit Source
0 TxDone
1 RxDone
2 PreambleDetected
3 SyncDetected
4 HeaderValid
5 HeaderErr
6
CrcErr
bits 15:0 NbPktHeaderError[15:0]: Number of packets received with a header CRC
error
1
0x00 0x00
w
bits 7:0 Opcode: 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0

Table 37. IRQ bit mapping and definition

Packet transmission finished
Packet reception finished
Preamble detected
Synchronization word valid
Header CRC error
preamble, syncword, address,
Err
CRC or length error
2 3
0x00
w w
Description
Header valid
CRC error
RM0453 Rev 5
Sub-GHz radio (SUBGHZ)
4 5
0x00 0x00
w w
Packet type Operation
LoRa and GFSK
LoRa and GFSK
LoRa and GFSK
GFSK
LoRa
LoRa
GFSK
LoRa
6
0x00
w
Tx
Rx
Rx
Rx
Rx
Rx
Rx
Rx
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