STMicroelectronics STM32WL5 Series Reference Manual page 612

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Digital-to-analog converter (DAC)
Bit 12 Reserved, must be kept at reset value.
Bit 11 Reserved, must be kept at reset value.
Bits 10:0 Reserved, must be kept at reset value.
19.7.8
DAC calibration control register (DAC_CCR)
Address offset: 0x38
Reset value: 0x0000 00XX
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:5 Reserved, must be kept at reset value.
Bits 4:0 OTRIM1[4:0]: DAC channel1 offset trimming value
19.7.9
DAC mode control register (DAC_MCR)
Address offset: 0x3C
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:10 Reserved, must be kept at reset value.
Bit 9 Reserved, must be kept at reset value.
612/1450
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
Res.
RM0453 Rev 5
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
OTRIM1[4:0]
rw
rw
rw
21
20
19
18
Res.
Res.
Res.
5
4
3
2
Res.
Res.
rw
RM0453
17
16
Res.
Res.
1
0
rw
rw
17
16
Res.
Res.
1
0
MODE1[2:0]
rw
rw

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