Peripherals interconnect matrix
12
Peripherals interconnect matrix
12.1
Introduction
Several peripherals have direct connections between them, enabling autonomous
communication and/or synchronization between them. This saves CPU resources and,
consequently power consumption. In addition, these hardware connections remove
software latency and result in more predictable system design.
Depending on peripherals, these interconnections can operate in Run, Sleep, LPRun,
LPSleep, Stop 0, Stop 1 and Stop 2 modes.
12.2
Connection summary
Source
TIM1
TIM2
TIM16
TIM17
LPTIM1
LPTIM2
LPTIM3
ADC
Temperature
sensor
VBAT
VREFINT
HSE32
LSE
MSI
LSI
MCO
GPIO EXTI
RTC
TAMP
446/1450
Table 76. STM32WL5x peripherals interconnect matrix
-
1
-
-
1
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
6
-
6
6
-
-
-
-
6
-
-
6
-
-
-
-
6
-
-
-
-
-
-
6
-
-
-
-
-
RM0453 Rev 5
Destination
-
-
-
3
-
-
-
3
-
-
-
-
-
-
-
-
-
-
2
-
-
-
2
-
-
-
-
-
-
-
-
-
-
-
9
-
-
-
9
-
-
-
9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
7
7
-
-
7
7
-
-
(1) (2)
3
8
8
-
3
8
8
-
-
-
-
-
-
-
-
-
4
-
-
13
4
-
-
13
-
-
-
13
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3
-
-
13
-
-
-
-
-
-
-
-
RM0453
-
-
-
-
12
-
12
-
-
-
-
-
-
14
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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