Table 74. Gpioh Register Map And Reset Values - STMicroelectronics STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
Table of Contents

Advertisement

RM0453
10.4.36
GPIOH register map
Offset Register name
GPIOH_MODER
0x1C00
Reset value
GPIOH_OTYPER
0x1C04
Reset value
GPIOH_OSPEEDR
0x1C08
Reset value
GPIOH_PUPDR
0x1C0C
Reset value
GPIOH_IDR
0x1C10
Reset value
GPIOH_ODR
0x1C14
Reset value
GPIOH_BSRR
0x1C18
Reset value
GPIOH_LCKR
0x1C1C
Reset value
GPIOH_AFRL
0x1C20
Reset value
0x1C24
Reserved
GPIOH_BRR
0x1C28
Reset value
Refer to

Table 74. GPIOH register map and reset values

Section 2.6
for the register boundary addresses.
0
0
AFSEL3[3:0]
0
0
Reserved.
RM0453 Rev 5
General-purpose I/Os (GPIO)
1
1
0
0
0
0
0
0
0
x
0
0
0
0
431/1450
431

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32WL5 Series and is the answer not in the manual?

Subscribe to Our Youtube Channel

This manual is also suitable for:

Stm32wl55 seriesStm32wl54 series

Table of Contents