Figure 29. Hse32 Tcxo Control - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
Frequency trimming
When using HSE32 with external crystal, the load capacitors are provided by the integrated
capacitor banks, that can be trimmed. The HSE32 load capacitor trimming allows a
compensation of device manufacturing process variations, used crystal and PCB design.
The HSE32 frequency can be tuned in the application via the sub-GHz radio registers
SUBGHZ_HSEINTRIMR and SUBGHZ_HSEOUTRIMR. For more information see
Section 5.4: Sub-GHz radio
The HSE32 frequency can be measured by outputting the HSE32 clock on the MCO when
in Run mode.
External source (HSE32 TXCO)
In this mode, an external TXCO clock source must be provided. This external source
frequency must be 32 MHz. This mode is selected by setting the HSEBYPPWR and
HSEON bits in the
the datasheet) must drive the following pins (see
•
OSC_IN and OSC_OUT pins: OSC_IN pin must be driven, while the OSC_OUT pin
must be left not connected.
The TCXO supply can be provided by the device on PB0/VDDTCXO. The V
is also enabled with the HSEBYPPWR bit in
enabling the HSE32 oscillator. V
be configured through the sub-GHz radio Set_TcxoMode() command (see
Sub-GHz radio (SUBGHZ)
The control of the HSE32 external TCXO can be done in the following ways:
• powered by V
–
–
–
–
clocks.
RCC clock control register
for more details).

Figure 29. HSE32 TCXO control

PB0 GPIO
HSEBYPPWR
tcxoon
HSEON
oscon
OSC
Radio control
Control
HSERDY
RDY
HSEclk
Control
:
DDTCXO
Set the voltage level inside the sub-GHz radio by using the Set_TcxoMode()
command, before enabling the VDDTCXO regulator.
Set the HSEBYPPWR bit to 1 to use the VDDTCXO regulator.
Enable the HSE32 use with external TCXO in Run mode for the CPUs with the
HSEON bit.The availability of the clock can be checked with the HSERDY bit.
Enable the HSE32 use with TXCXO for the sub-GHz radio with the sub-GHz radio
Set_TcxoMode() command when in sub-GHz radio Standby mode. It is
recommended to issue a sub-GHz radio calibration command once the HSE32
clock is available.
(RCC_CR). The external clock signal (refer to
Figure 28: HSE32 clock
RCC clock control register (RCC_CR)
supply level and TCXO clock startup timeout can
DDTCXO
LDO
1
TCXO
0
OSC
HSE32
en
C
LIN
clk
RM0453 Rev 5
Reset and clock control (RCC)
sources):
DDTCXO
VDDRF
PB0-VDDTCXO
VDD TCXO
TCXO
OSC_IN
R CLK
OSC_OUT NC
Note: Force SUBGHZ_HSEINTRIMR = 0x00
to get C = 11.3 pF.
LIN
supply
before
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