Pwr Control Register 4 (Pwr_Cr4) - STMicroelectronics STM32WL5 Series Reference Manual

Power control (PWR)
Bit 2 EWUP3: Wake-up pin WKUP3 for CPU1 enable
Bit 1 EWUP2: Wake-up pin WKUP2 for CPU1 enable
Bit 0 EWUP1: Wake-up pin WKUP1 for CPU1 enable
6.6.4

PWR control register 4 (PWR_CR4)

This register is not reset when exiting Standby modes.
Access: additional APB cycles are needed to access this register versus those needed for a
standard APB access (three for a write and two for a read).
Address offset: 0x00C
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res.
rw
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 C2BOOT: CPU2 boot after reset or wake-up from Stop or Standby mode
Bits 14:12 Reserved, must be kept at reset value.
Bit 11 WRFBUSYP: Wake-up radio busy polarity
Bit 10 Reserved, must be kept at reset value.
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When this bit is set, the external wake-up pin WKUP3 is enabled and triggers an interrupt
and wake-up from Stop, Standby or Shutdown event when a rising or a falling edge occurs to
CPU1. The active edge is configured via the WP3 bit in the
(PWR_CR4).
When this bit is set, the external wake-up pin WKUP2 is enabled and triggers an interrupt
and wake-up from Stop, Standby or Shutdown event when a rising or a falling edge occurs to
CPU1. The active edge is configured via the WP2 bit in the
(PWR_CR4).
When this bit is set, the external wake-up pin WKUP1 is enabled and triggers an interrupt
and wake-up from Stop, Standby or Shutdown event when a rising or a falling edge occurs to
CPU1. The active edge is configured via the WP1 bit in the
(PWR_CR4).
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. VBRS
rw rw
0: No CPU2 boot after reset or wake-up from Stop or Standby mode
1: CPU2 boot after reset and after wake-up from Stop or Standby mode, when there is a
CPU2 wake-up event
This bit defines the polarity used for an event detection on radio busy signal.
0: Detection on high level (rising edge)
1: Detection on low level (falling edge)
24 23 22
Res. Res. Res.
8 7 6
VBE Res. Res.
rw
RM0453 Rev 5
PWR control register 4
PWR control register 4
PWR control register 4
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res. Res. Res. WP3
rw
RM0453
17 16
Res. Res.
1 0
WP2 WP1
rw rw