Figure 273. Window Watchdog Timing Diagram - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
31.3.5 How to program the watchdog timeout
Use the formula in
Warning:
CNT DownCounter
T[6:0]
W[6:0]
0x3F
wwdg_ewit
wwdg_rst
T6 bit
The formula to calculate the timeout value is given by:
where:
t
WWDG
t
PCLK
4096: value corresponding to internal divider
Figure 273 to calculate the WWDG timeout.
When writing to the WWDG_CR register, always write 1 in the
T6 bit to avoid generating an immediate reset.

Figure 273. Window watchdog timing diagram

Refresh not allowed
×
t WWDG = t PCLK
: WWDG timeout
: APB clock period measured in ms
System window watchdog (WWDG)
Refresh allowed
0x41
0x40
0x3F
WDGTB[2:0]
×
4096 2
RM0453 Rev 5
WDGTB
T x 4096 x 2
pclk
EWIF = 0
× ( [ ] )
T 5:0 + 1
Time
MS47266V1
( )
ms
985/1450
988