STMicroelectronics STM32WL5 Series Reference Manual page 40

Contents
38.3.9
38.4 Debug port (DP) registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1320
38.4.1
38.4.2
38.4.3
38.4.4
38.4.5
38.4.6
38.4.7
38.4.8
38.4.9
38.4.10 DP target identification register (DP_TARGETSELR) . . . . . . . . . . . . 1328
38.4.11 DP register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . . 1329
38.5 Access ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1330
38.5.1
38.5.2
38.5.3
38.5.4
38.5.5
38.5.6
38.5.7
38.6 Data watchpoint and trace unit (DWT) . . . . . . . . . . . . . . . . . . . . . . . . . 1338
38.6.1
38.6.2
38.6.3
38.6.4
38.6.5
38.6.6
38.6.7
38.6.8
38.6.9
38.6.10 DWT mask register x (DWT_MASKxR) . . . . . . . . . . . . . . . . . . . . . . . 1343
38.6.11 DWT function register x (DWT_FUNCTxR) . . . . . . . . . . . . . . . . . . . . 1344
38.6.12 DWT CoreSight peripheral identity register 4 (DWT_PIDR4) . . . . . . 1345
38.6.13 DWT CoreSight peripheral identity register 0 (DWT_PIDR0) . . . . . . 1345
38.6.14 DWT CoreSight peripheral identity register 1 (DWT_PIDR1) . . . . . . 1346
38.6.15 DWT CoreSight peripheral identity register 2 (DWT_PIDR2) . . . . . . 1346
40/1450
Serial-wire debug port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1319
DP identification register (DP_DPIDR) . . . . . . . . . . . . . . . . . . . . . . . 1322
DP abort register (DP_ABORTR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1322
DP control and status register (DP_CTRLSTATR) . . . . . . . . . . . . . . 1323
DP data link control register (DP_DLCR) . . . . . . . . . . . . . . . . . . . . . . 1325
DP target identification register (DP_TARGETIDR) . . . . . . . . . . . . . . 1326
DP data link protocol identification register (DP_DLPIDR) . . . . . . . . 1326
DP resend register (DP_RESENDR) . . . . . . . . . . . . . . . . . . . . . . . . . 1327
DP access port select register (DP_SELECTR) . . . . . . . . . . . . . . . . 1327
DP read buffer register (DP_BUFFR) . . . . . . . . . . . . . . . . . . . . . . . . 1328
AP control/status word register (AP_CSWR) . . . . . . . . . . . . . . . . . . . 1334
AP transfer address register (AP_TAR) . . . . . . . . . . . . . . . . . . . . . . . 1335
AP data read/write register (AP_DRWR) . . . . . . . . . . . . . . . . . . . . . . 1335
AP banked data registers x (AP_BDxR) . . . . . . . . . . . . . . . . . . . . . . 1336
AP base address register (AP_BASER) . . . . . . . . . . . . . . . . . . . . . . 1336
AP identification register (AP_IDR) . . . . . . . . . . . . . . . . . . . . . . . . . . 1337
AP register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . . 1337
DWT control register (DWT_CTRLR) . . . . . . . . . . . . . . . . . . . . . . . . 1339
DWT cycle count register (DWT_CYCCNTR) . . . . . . . . . . . . . . . . . . 1341
DWT CPI count register (DWT_CPICNTR) . . . . . . . . . . . . . . . . . . . . 1341
DWT exception count register (DWT_EXCCNTR) . . . . . . . . . . . . . . . 1341
DWT sleep count register (DWT_SLPCNTR) . . . . . . . . . . . . . . . . . . 1342
DWT LSU count register (DWT_LSUCNTR) . . . . . . . . . . . . . . . . . . . 1342
DWT fold count register (DWT_FOLDCNTR) . . . . . . . . . . . . . . . . . . 1342
DWT program counter sample register (DWT_PCSR) . . . . . . . . . . . 1343
DWT comparator register x (DWT_COMPxR) . . . . . . . . . . . . . . . . . . 1343
RM0453 Rev 5
RM0453