STMicroelectronics STM32WL5 Series Reference Manual page 514

Extended interrupts and event controller (EXTI)
16.6.1 EXTI rising trigger selection register (EXTI_RTSR1)
Address offset: 0x000
Reset value: 0x0000 0000
Contains only register bits for configurable events.
31 30 29
Res. Res. Res. Res.
15 14 13
RT15 RT14 RT13 RT12
rw rw rw
Bits 31:23 Reserved, must be kept at reset value.
Bit 22 RT22: rising trigger event configuration bit of configurable event input 22
Note: The configurable event inputs are edge triggered. No glitch must be generated on
Bit 21 RT21: rising trigger event configuration bit of configurable event input 21
Bits 20:17 Reserved, must be kept at reset value.
Bit 16 RT16: rising trigger event configuration bit of configurable event input 16
Bit 15 RT15: rising trigger event configuration bit of configurable event input 15
Bit 14 RT14: rising trigger event configuration bit of configurable event input 14
Bit 13 RT13: rising trigger event configuration bit of configurable event input 13
Bit 12 RT12: rising trigger event configuration bit of configurable event input 12
Bit 11 RT11: rising trigger event configuration bit of configurable event input 11
Bit 10 RT10: rising trigger event configuration bit of configurable event input 10
Bit 9 RT9: rising trigger event configuration bit of configurable event input 9
Bit 8 RT8: rising trigger event configuration bit of configurable event input 8
Bit 7 RT7: rising trigger event configuration bit of configurable event input 7
Bit 6 RT6: rising trigger event configuration bit of configurable event input 6
Bit 5 RT5: rising trigger event configuration bit of configurable event input 5
Bit 4 RT4: rising trigger event configuration bit of configurable event input 4
Bit 3 RT3: rising trigger event configuration bit of configurable event input 3
Bit 2 RT2: rising trigger event configuration bit of configurable event input 2
Bit 1 RT1: rising trigger event configuration bit of configurable event input 1
Bit 0 RT0: rising trigger event configuration bit of configurable event input 0
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28 27 26 25
Res. Res. Res.
12 11 10 9
RT11 RT10 RT9
rw rw rw rw
0: Rising trigger disabled (for event and interrupt) for input line
1: Rising trigger enabled (for event and interrupt) for input line
these inputs. If a rising edge on the configurable event input occurs while writing to the
register, the associated pending bit is not set.
Rising and falling edge triggers can be set for the same configurable event input. In this
case, both edges generate a trigger.
24 23 22
Res. Res. RT22 RT21
rw
8 7 6
RT8 RT7 RT6
rw rw rw
RM0453 Rev 5
21 20 19 18
Res. Res. Res.
rw
5 4 3 2
RT5 RT4 RT3 RT2
rw rw rw rw
RM0453
17 16
Res. RT16
rw
1 0
RT1 RT0
rw rw