STMicroelectronics STM32WL5 Series Reference Manual page 927

RM0453
27.4.6 TIMx capture/compare mode register 1
(TIMx_CCMR1)(x = 16 to 17)
Address offset: 0x18
Reset value: 0x0000 0000
The same register can be used for input capture mode (this section) or for output compare
mode (next section). The direction of a channel is defined by configuring the corresponding
CCxS bits. All the other bits of this register have a different function in input and in output
mode.
Input capture mode:
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:4 IC1F[3:0]: Input capture 1 filter
This bit-field defines the frequency used to sample TI1 input and the length of the digital filter
applied to TI1. The digital filter is made of an event counter in which N consecutive events
are needed to validate a transition on the output:
0000: No filter, sampling is done at f
0001: f
0010: f
0011: f
0100: f
0101: f
0110: f
0111: f
1000: f
1001: f
1010: f
1011: f
1100: f
1101: f
1110: f
1111: f
Bits 3:2 IC1PSC[1:0]: Input capture 1 prescaler
This bit-field defines the ratio of the prescaler acting on CC1 input (IC1).
The prescaler is reset as soon as CC1E='0' (TIMx_CCER register).
00: no prescaler, capture is done each time an edge is detected on the capture input.
01: capture is done once every 2 events
10: capture is done once every 4 events
11: capture is done once every 8 events
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
=f , N=2
SAMPLING CK_INT
=f , N=4
SAMPLING CK_INT
=f , N=8
SAMPLING CK_INT
=f /2, N=
SAMPLING DTS
=f /2, N=8
SAMPLING DTS
=f /4, N=6
SAMPLING DTS
=f /4, N=8
SAMPLING DTS
=f /8, N=6
SAMPLING DTS
=f /8, N=8
SAMPLING DTS
=f /16, N=5
SAMPLING DTS
=f /16, N=6
SAMPLING DTS
=f /16, N=8
SAMPLING DTS
=f /32, N=5
SAMPLING DTS
=f /32, N=6
SAMPLING DTS
=f /32, N=8
SAMPLING DTS
General-purpose timers (TIM16/TIM17)
24 23 22
Res. Res. Res.
8 7 6
Res. IC1F[3:0]
rw rw
DTS
RM0453 Rev 5
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
IC1PSC[1:0]
rw rw rw rw
17 16
Res. Res.
1 0
CC1S[1:0]
rw rw
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