Table 121. Vrefbuf Register Map And Reset Values - STMicroelectronics STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Bits 31:6 Reserved, must be kept at reset value.
Bits 5:0 TRIM[5:0]: Trimming code
Note: If the user application performs the trimming, the trimming code must start from 000000
20.3.3
VREFBUF register map
The following table gives the VREFBUF register map and the reset values.
Offset Register name
VREFBUF_CSR
0x00
Reset value
VREFBUF_CCR
0x04
Reset value
Refer to
These bits are automatically initialized after reset with the trimming value stored in the flash
memory during the production test. Writing into these bits allows the tuning of the internal
reference buffer voltage.
to 111111 in ascending order.

Table 121. VREFBUF register map and reset values

Section 2.6
for the register boundary addresses.
Voltage reference buffer (VREFBUF)
RM0453 Rev 5
0 0
1 0
TRIM[5:0]
x
x
x
x
x
x
619/1450
619

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