Figure 25. Cpus Low-Power Modes Possible Transitions - STMicroelectronics STM32WL5 Series Reference Manual

Power control (PWR)
Sub-system modes
RUN
LP-RUN
Wakeup from STOP with CPU HOLD
STOP0
STOP1
STOP2
LP-STOP
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Figure 25. CPUs low-power modes possible transitions

CPU1 CRUN or CSLEEP
CPU2 CRUN or CSLEEP
C2_wakeup
reset
C2STOP
CPU1 CRUN or CSLEEP
CPU2 CSTOP
HCLK1 RUN
HCLK3 RUN
C1_wakeup
C1STOP
STANDBY
Wakeup CPU1
Wakeup
Bus modes
C1_wakeup
HCLK1 RUN
HCLK3 RUN
C1_wakeup
C1STOP
CPU1 CSTOP
CPU2 CRUN or CSLEEP
HCLK1 STOP
HCLK3 RUN
C2_wakeup
CPU1 CSTOP
CPU2 CSTOP
HCLK1 STOP
HCLK3 STOP
Enter STANDBY
STANDBY
SHUTDOWN
Enter SHUTDOWN
SHUTDOWN
RM0453 Rev 5
System modes
CPU2 sub-system having
allocated peripheral in the
HCLK1 domain
CPU1 CSTOP
C1STOP
CPU2 CRUN or CSLEEP
HCLK1 peripheral
allocation
HCLK1
peripheral
delocation
C2STOP
C2STOP
Wakeup CPU2
RM0453
MSv50977V1