Table 171. Ecdsa Verification Average Computation Times; Table 172. Point On Elliptic Curve Fp Check Average Computation Times; Table 173. Montgomery Parameters Average Computation Times; Table 174. Pka Interrupt Requests - STMicroelectronics STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Public key accelerator (PKA)
160
3500000

Table 172. Point on elliptic curve Fp check average computation times

160
10800
160
4518
1. The computation times depend upon the length and the value of the modulus, hence these values are
average execution times of random moduli of given length.
24.6
PKA interrupts
There are three individual maskable interrupt sources generated by the public key
accelerator, signaling the following events:
1.
access to unmapped address (ADDRERRF), see
2.
PKA RAM access while PKA operation is in progress (RAMERRF), see
3.
PKA end of operation (PROCENDF)
The three interrupt sources are connected to the same global interrupt request signal pka_it.
The user can enable or disable above interrupt sources individually by changing the mask
bits in the
interrupt. The status of the individual interrupt events can be read from the PKA status
register (PKA_SR), and it is cleared in PKA_CLRFR register.
Table 174
Interrupt
Interrupt event
acronym
Access to unmapped address error
PKA
PKA RAM access error
PKA end of operation
716/1450

Table 171. ECDSA verification average computation times

192
256
5350000
10498000
192
14200

Table 173. Montgomery parameters average computation times

192
256
320
7846
11848
14902
PKA control register
(PKA_CR). Setting the appropriate mask bit to 1 enables the
gives a summary of the available features.

Table 174. PKA interrupt requests

Modulus length (in bits)
320
18126000
Modulus length (in bits)
256
320
20400
31000
Modulus length (in bits)
384
512
21682
35012
Event flag
Enable control bit
ADDRERRF
ADDRERRIE
RAMERRF
RAMERRIE
PROCENDF
PROCENDIE
RM0453 Rev 5
384
512
29118000
61346000
384
49600
521
1024
2048
64000
119536
466146 1104642
Section 24.3.7
Interrupt clear method
Set ADDRERRFC bit
Set RAMERRFC bit
Set PROCENDFC bit
RM0453
521
71588000
512
82400
(1)
3072
Section 24.3.7

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