Register Access Protection - STMicroelectronics STM32WL5 Series Reference Manual

Embedded flash memory (FLASH)
4.9

Register access protection

The user option registers may be protected by security and privilege.
When the system is secure (ESE = 1) and the user option registers in the flash memory are
also protected by privileged (FLASH_PRIVMODER.PRIV = 1), the flash memory secure
user option bits (FSD, SFSA, BRSD, SBRSA, NBRSD, SNBRSA, SBRV, C2OPT, HDPAD,
HDPSA and DDS) are secure and privileged. They can be written only by the secure
privileged CPU2 and read by any CPU secure and non-secure, unprivileged and privileged.
When the CPU1 or the unprivileged CPU2 tries to write, the write is discarded and a flash
memory illegal access interrupt is generated.
When the system is secure (ESE = 1) and the user option bits in the flash memory are also
protected by privileged (FLASH_PRIVMODER.PRIV = 1), the other non-secure user option
bits are privileged. They can be written only by a privileged CPU1 or CPU2, and read by
CPU1, CPU2 unprivileged and privileged. On an unprivileged write access, the write is
discarded and a flash memory illegal access interrupt is generated.
1. PRIVMODE privilege protection is only available when the device is secure ESE = 1.
2. Secure-privileged write access protected at any time, regardless of the device security ESE and
PRIVMODE values.
3. Secure write access protection is only applicable when the device is secure ESE = 1
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Table 24: Register protection overview
Registers
FLASH_CxACR
FLASH_ACR2
FLASH_KEYR
FLASH_OPTKEYR
FLASH_CxSR
FLASH_CxCR
FLASH_ECCR
FLASH_OPTR
FLASH_PCROP1xSR/ER
FLASH_WRP1xR
FLASH_IPCCBR
FLASH_SFR
FLASH_SRRVR
RM0453 Rev 5
Security PRIVMODE
No
(2)
Yes
No
No
No
No
No
No Yes
No Yes
No Yes
No Yes
(3)
Yes Yes
(3)
Yes Yes
RM0453
(1)
No
No
No
No
No
No
No