Figure 38. Ipcc Simplex - Send Procedure State Diagram - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
Communication data
Complete communication posted
Write CHnS (set CHnF = 1)
To send communication data:
•
The sending processor checks the channel status flag CHnF:
–
–
–
• Once the complete communication data is posted, the channel status is set to occupied
with CHnS. This gives memory access to the receiving processor and generates the
RX occupied interrupt.

Figure 38. IPCC Simplex - Send procedure state diagram

Send
Read CHnF
CHnF = 0
Write
Communication
data to memory
Set Channel N
occupied
End
When CHnF = 0, the channel is free (last communication data retrieved by the
receiving processor), and the new communication data can be written.
When CHnF = 1, the channel is occupied (last communication data not retrieved
by the receiving processor), and the sending processor unmasks the channel free
interrupt (CHnFM = 0).
On a TX free interrupt, the sending processor checks which channel became free
and masks the channel free interrupt (CHnFM = 1). Then the new communication
can take place.
Inter-processor communication controller (IPCC)
CHnF = 1
Write CHnFM = 1
RM0453 Rev 5
UNMASK
Channel N
free interrupt
Write CHnFM = 0
Wait for
TX free interrupt
TX
TX free interrupt
free interrupt
Read CHnF = 0
MASK
Channel N
free interrupt
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