STMicroelectronics STM32WL5 Series Reference Manual page 409

RM0453
10.3.15 Using PH3 as GPIO
PH3 may be used as boot pin (BOOT0) or as GPIO.
PH3 switches from the input mode to the analog input mode depending on the nSWBOOT0
bit in the user option byte as follows:
•
After the option byte loading phase if nSWBOOT0 = 1.
•
After reset if nSWBOOT0 = 0.
10.4 GPIO registers
This section gives a detailed description of the GPIO registers for GPIOx port,
with x = A to C and x = H.
For a summary of register bits, register address offsets and reset values, refer to
Table 74.
The peripheral registers can be written in word, half word or byte mode.
10.4.1 GPIOx mode register (GPIOx_MODER) (x = A to B)
Address offset: Block A: 0x0000
Address offset: Block B: 0x0400
Reset value: Block A: 0xABFF FFFF
Reset value: Block B: 0xFFFF FEBF
31 30 29
MODE15[1:0] MODE14[1:0]
rw rw rw
15 14 13
MODE7[1:0] MODE6[1:0]
rw rw rw
Bits 31:0 MODEy[1:0]: Port Pxy I/O type configuration (y = 15 to 0)
28 27 26 25
MODE13[1:0] MODE12[1:0]
rw rw rw rw
12 11 10 9
MODE5[1:0] MODE4[1:0]
rw rw rw rw
These bits are written by software to configure the I/O mode.
00: Input mode
01: General purpose output mode
10: Alternate function mode
11: Analog mode (reset state)
24 23 22
MODE11[1:0]
rw rw rw
8 7 6
MODE3[1:0]
rw rw rw
RM0453 Rev 5
General-purpose I/Os (GPIO)
21 20 19 18
MODE10[1:0] MODE9[1:0]
rw rw rw rw
5 4 3 2
MODE2[1:0] MODE1[1:0]
rw rw rw rw
Table 71 to
17 16
MODE8[1:0]
rw rw
1 0
MODE0[1:0]
rw rw
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