Sub-Ghz Radio Rtc Period Msb Register (Subghz_Rtcprdr2); Sub-Ghz Radio Rtc Period Mid-Byte Register; (Subghz_Rtcprdr1); Sub-Ghz Radio Rtc Period Lsb Register (Subghz_Rtcprdr0) - STMicroelectronics STM32WL5 Series Reference Manual

Sub-GHz radio (SUBGHZ)
Bits 7:1 Reserved, must be kept at reset value.
Bit 0 RTCEN: Writing 1 restarts the radio RTC.
5.10.52

Sub-GHz radio RTC period MSB register (SUBGHZ_RTCPRDR2)

Address offset: 0x906
Reset value: 0x00
7 6
rw rw
Bits 7:0 RTCPRD[31:16]: Updates radio RTC period (MSB)
5.10.53

Sub-GHz radio RTC period mid-byte register

(SUBGHZ_RTCPRDR1)

Address offset: 0x907
Reset value: 0x00
7 6
rw rw
Bits 7:0 RTCPRD[15:8]: Updates radio RTC period (mid-byte)
5.10.54

Sub-GHz radio RTC period LSB register (SUBGHZ_RTCPRDR0)

Address offset: 0x908
Reset value: 0x00
7 6
rw rw
Bits 7:0 RTCPRD[7:0]: Updates radio RTC period (LSB)
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5 4
RTCPRD[31:16]
rw rw
5 4
RTCPRD[15:8]
rw rw
5 4
RTCPRD[7:0]
rw rw
RM0453 Rev 5
3 2
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3 2
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3 2
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RM0453
1 0
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1 0
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1 0
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