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System configuration controller (SYSCFG)
11
System configuration controller (SYSCFG)
11.1
SYSCFG main features
STM32WL5x devices feature a set of configuration registers. The main purposes of the
system configuration controller are the following:
•
Remapping memory areas
•
Managing the external interrupt line connection to the GPIOs
•
Managing robustness feature
•
Setting SRAM2 write protection and SRAM2 software erase
•
SRAM1, SRAM2 and PKA SRAM erase busy flags
•
Enabling /disabling I
booster for I/Os analog switches.
•
Interrupt pre-masking
11.2
SYSCFG registers
11.2.1
SYSCFG memory remap register (SYSCFG_MEMRMP)
This register is used for specific configurations on memory remap.
Address offset: 0x000
Reset value: 0x0000 000X
MEM_MODE[2:0] is the memory mode selected by the BOOT0 pin and BOOT1 option bit.
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:3 Reserved, must be kept at reset value.
Bits 2:0 MEM_MODE[2:0]: memory mapping selection
432/1450
2
C Fast-mode Plus driving capability on some I/Os and voltage
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
These bits control the memory internal mapping at address 0x0000 0000. These bits are
used to select the physical remap by software and so, bypass the BOOT mode setting.
After reset, these bits take the value selected by BOOT0 (pin or option bit depending on
nSWBOOT0 option bit) and BOOT1 option bit.
000: Main flash memory mapped at CPU1 0x00000000
001: System flash memory mapped at CPU1 0x00000000
010: Reserved
011: SRAM1 mapped at CPU1 0x00000000
100: Reserved
101: Reserved
110: Reserved
111: Reserved
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
Res.
RM0453 Rev 5
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
Res.
rw
RM0453
17
16
Res.
Res.
1
0
MEM_MODE[2:0]
rw
rw
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