STMicroelectronics STM32WL5 Series Reference Manual page 213

RM0453
5.10.18 Sub-GHz radio generic synchronization word control register 0
(SUBGHZ_GSYNCR0)
Address offset: 0x6C0
Reset value: 0x97
7 6
rw rw
Bits 7:0 SYNCWORD[63:56]: Eight byte of generic packet synchronization word
5.10.19 Sub-GHz radio generic synchronization word control register 1
(SUBGHZ_GSYNCR1)
Address offset: 0x6C1
Reset value: 0x23
7 6
rw rw
Bits 7:0 SYNCWORD[55:48]: Seventh byte of generic packet synchronization word
5.10.20 Sub-GHz radio generic synchronization word control register 2
(SUBGHZ_GSYNCR2)
Address offset: 0x6C2
Reset value: 0x52
7 6
rw rw
Bits 7:0 SYNCWORD[47:40]: Sixth byte of generic packet synchronization word
5.10.21 Sub-GHz radio generic synchronization word control register 3
(SUBGHZ_GSYNCR3)
Address offset: 0x6C3
Reset value: 0x25
7 6
rw rw
Bits 7:0 SYNCWORD[39:32]: Fifth byte of generic packet synchronization word
5 4
SYNCWORD[63:56]
rw rw
5 4
SYNCWORD[55:48]
rw rw
5 4
SYNCWORD[47:40]
rw rw
5 4
SYNCWORD[39:32]
rw rw
RM0453 Rev 5
Sub-GHz radio (SUBGHZ)
3 2
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3 2
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3 2
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3 2
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1 0
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1 0
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1 0
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1 0
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