ST STM32G4 Series Reference Manual page 1987

RM0440
Bit 13 LCK: Locked
Bits 12:11 LSOF[1:0]: Lost SOF
Bits 10:0 FN[10:0]: Frame number
USB device address (USB_DADDR)
Address offset: 0x4C
Reset value: 0x0000
15 14 13 12
Res. Res. Res. Res.
Bits 15:8 Reserved
Bit 7 EF: Enable function
Bits 6:0 ADD[6:0]: Device address
Buffer table address (USB_BTABLE)
Address offset: 0x50
Reset value: 0x0000
15 14 13
rw rw rw
This bit is set by the hardware when at least two consecutive SOF packets have been
received after the end of an USB reset condition or after the end of an USB resume
sequence. Once locked, the frame timer remains in this state until an USB reset or USB
suspend event occurs.
These bits are written by the hardware when an ESOF interrupt is generated, counting the
number of consecutive SOF packets lost. At the reception of an SOF packet, these bits are
cleared.
This bit field contains the 11-bits frame number contained in the last received SOF packet.
The frame number is incremented for every frame sent by the host and it is useful for
Isochronous transfers. This bit field is updated on the generation of an SOF interrupt.
11 10 9
Res. Res. Res.
This bit is set by the software to enable the USB device. The address of this device is
contained in the following ADD[6:0] bits. If this bit is at '0 no transactions are handled,
irrespective of the settings of USB_EPnR registers.
These bits contain the USB function address assigned by the host PC during the
enumeration process. Both this field and the Endpoint Address (EA) field in the associated
USB_EPnR register must match with the information contained in a USB token in order to
handle a transaction to the required endpoint.
12 11 10 9
BTABLE[15:3]
rw rw rw rw
Universal serial bus full-speed device interface (USB)
8 7 6
Res. EF ADD6 ADD5
rw rw rw
8 7 6
rw rw rw
RM0440 Rev 1
5 4 3 2
ADD4 ADD3 ADD2
rw rw rw
5 4 3 2
Res.
rw rw rw
1 0
ADD1 ADD0
rw rw
1 0
Res. Res.
1987/2083
1998